Fabio PaniaLondon, UK

← Product Portfolio

Embedded Algorithms for Software Defined Radio

Embedded systems research at NXP on automotive Software Defined Radio (SDR): taking a novel in-house algorithm from maths into real vector-DSP implementations, adapting it for embedded trade-offs, and benchmarking hardware options to guide commercialisation.

CompanyNXP Semiconductors
RoleResearch Scientist
In-car software defined radio
Algorithm diagram Algorithm diagram Algorithm diagram SINR performance graphs Doppler effect diagram Vector processing diagram Compensation technique diagram

Product

Part of SDR4Car — a single-chip, multi-standard, multi-radio SDR for in-car digital radio and TV. Experienced mathematicians in the team devised Simple Doppler Compensating Combining (SDCC): multi-antenna combining that mitigates inter-carrier interference (ICI) from Doppler in OFDM, aiming for best-in-class mobile reception at high speed.

I bridged theory to silicon decisions: studied SDCC, adapted and modified the algorithm for real embedded constraints, and compared implementations on two vector DSPs (NXP EVP and Tensilica Xtensa) to find the best compromises — accuracy vs speed (clock cycles), complexity and hardware fit — so the business could decide which platform and which embedded realisation to take forward. Floating-point Matlab reference → 16-bit fixed-point on the DSPs; cycle-accurate simulation, profiling and benchmarks fed guidelines back to Research and Business.

Key Features

  • Embedded systems · embedded algorithms · vector DSP
  • Automotive Software Defined Radio (SDR) — multi-standard, multi-radio, single-chip / SoC target
  • SDCC: multi-antenna Doppler/ICI mitigation for OFDM (digital radio & TV) — maximise SINR
  • Dual platforms: NXP EVP (fixed ISA) and Tensilica Xtensa (extensible ISA / configurable dataplane)
  • Adapted the algorithm for embedded use — accuracy / speed / complexity trade-offs — and benchmarked hardware options (EVP vs Xtensa) to inform commercialisation
  • SIMD (Single Instruction Multiple Data) and VLIW (Very Long Instruction Word) optimisation
  • Floating-point reference → fixed-point implementation; cycle-accurate simulation, profiling and debug
  • Architecture and instruction-set optimisation and benchmarking under low-power / high-performance constraints
  • Worked with a research team of mathematicians; owned the Vector DSP research and implementation